Problems related to the design and investigation of submicron and nanoscale MOS integrated circuits are covered by this course. Currently there are some nanotechnologies in the means of 14 nm design kits, which are available via the EUROPRACTICE organization. The main attention is drawn to the theoretical and practical usage of state-of-the-art industrial CAD systems, e.g. CADENCE, SYNOPSYS and others. The designers who use those systems can implement nanoscale elements from the relevant standard cell libraries. The specific parameters, related to the nanoscale effects are represented in the embedded system models of the elements.
COURSE TITLE | Design of ICs with CADENCE |
COURSE PLATFORM | Moodle |
COURSE WEB | https://moodle-tus.ecovem.eu/ |
ACCESS INFORMATION | Self-registration. Previously students must create an account in the Moodle platform |
PROVIDER INSTITUTION | Technical University of Sofia (TUS) |
PROVIDER CONTACT | name: Ivelina Ruskova email: ruskova@tu-sofia.bg |
TEACHERS | T1-Ass. Professor Ivelina Ruskova |
TYPE OF COURSE | ☒ On-line (tutored) ☒ Hybrid on-site/on-line |
DATES EXPECTED OPENING | 01 October 2022 |
DATES AVAILABILITY | ☒ 365 days accessible |
WORKLOAD STUDENT (in hours) | 180 learning hours |
TYPE OF TRAINING | ☒ Initial VET ☒ Continuous VET |
EQF LEVELS | ☒ EQF 6 ☒ EQF 7 ☒ EQF 8 |
LANGUAGES | ☒ English ☒ Others (specify): Bulgarian |
MAIN SUBJECT | ☒ Integrated circuits design ☒ System design |
COURSE DESCRIPTION | Problems related to the design and investigation of submicron and nanoscale MOS integrated circuits are covered by this course. Currently there are some nanotechnologies in the means of 14 nm design kits, which are available via the EUROPRACTICE organization. The main attention is drawn to the theoretical and practical usage of state-of-the-art industrial CAD systems, e.g. CADENCE, SYNOPSYS and others. The designers who use those systems can implement nanoscale elements from the relevant standard cell libraries. The specific parameters, related to the nanoscale effects are represented in the embedded system models of the elements. |
KEYWORDS | KW1- integrated circuits KW2- CADENCE KW3- schematics KW4- layout KW3- design rule check |
LEARNING OBJECTIVES | LO1- To be able to create schematics of a circuit or system and simulate it using HSpice LO2- To be able to design layout of a monolithic IC for concrete technology LO3- To be able to conduct verification of the circuit LO4- To be able to work on a team project and to share responsibility of the project design |
PREREQUISITES | P1- Bachelor degree in electronics or physics P2- Engineers in electronics P3-Physicists P4- Microelectronics technology and design rules, solid state physics, computer added design in electronics. |