SEMI F47, Specification for Semiconductor Processing Equipment Voltage Sag Immunity, widely adopted across the industry, is the governing standard that defines voltage sag test levels and requirements for semiconductor tools. Since the implementation of SEMI F47, the vulnerability of semiconductor manufacturing to single-phase and two-phase voltage sags has improved greatly. However, semiconductor manufacturers continue to experience significant product loss and downtime due to voltage sag events. Given the ongoing issues with semiconductor plant downtime, a new SEMI Voltage Sag Immunity Task Force was formed to take a fresh look at the issue. The key objectives of this task force are to:
- Review the characteristics of the power quality events that are still causing semiconductor plant process downtime.
- Take a new look at the sensitivities in the process equipment.
- Determine any potential adjustments to equipment design, facility design, utility systems, or SEMI Standards to further reduce voltage sag induced losses by the semiconductor industry.
| COURSE TITLE | Voltage Sag for Manufacturing Fabs Overview |
| COURSE PLATFORM | GoToWebinar |
| COURSE WEB | https://www.semi.org/en/standards-watch-2021June/vs-workshop-for-manufacturing-fabs-overview https://www.semi.org/en/connect/events/voltage-sag-workshop-manufacturing-fabs |
| ACCESS INFORMATION | https://www.semi.org/en/connect/events/voltage-sag-workshop-manufacturing-fabs https://attendee.gotowebinar.com/recording/311095134940547073 |
| PROVIDER INSTITUTION | SEMI |
| PROVIDER CONTACT | name: Laura Nguyen, Paul Trio email: lnguyen@semi.org, ptrio@semi.org |
| TEACHERS | T1-Mark Stephens (EPRI) T2- Clayton Burns (National Grid) T3- Ed McGann (VELCO) T4 – Michael Noth (Austin Energy) T5 – Dan Sabin & Tony Hunt (Schneider Electric) T6 – Christopher “Dale” Moffitt (HP) T7 – William Meijs & Giel Croonen (ASML) T8 – Josh Pankratz (Advanced Energy) T9 – Steve Lewis (formerly with Lam Research) T10 – James Amano (SEMI) |
| TYPE OF COURSE | ☒ On-line (stand-alone) |
| DATES EXPECTED OPENING | Available now |
| DATES AVAILABILITY | ☒ 365 days accessible |
| WORKLOAD STUDENT (in hours) | 4 hours |
| TYPE OF TRAINING | ☒ Work-based training |
| EQF LEVELS | ☒ EQF 3 |
| LANGUAGES | ☒ English |
| MAIN SUBJECT | ☒ Fundamentals of microelectronics manufacturing |
| COURSE DESCRIPTION | SEMI F47, Specification for Semiconductor Processing Equipment Voltage Sag Immunity, widely adopted across the industry, is the governing standard that defines voltage sag test levels and requirements for semiconductor tools. Since the implementation of SEMI F47, the vulnerability of semiconductor manufacturing to single-phase and two-phase voltage sags has improved greatly. However, semiconductor manufacturers continue to experience significant product loss and downtime due to voltage sag events. Given the ongoing issues with semiconductor plant downtime, a new SEMI Voltage Sag Immunity Task Force was formed to take a fresh look at the issue. The key objectives of this task force are to: · Review the characteristics of the power quality events that are still causing semiconductor plant process downtime. · Take a new look at the sensitivities in the process equipment. · Determine any potential adjustments to equipment design, facility design, utility systems, or SEMI Standards to further reduce voltage sag induced losses by the semiconductor industry. |
| KEYWORDS | KW1- voltage sag KW2- F47 KW3- SEMI Standards KW4 – processing equipment KW5 – semiconductor fab downtime KW6 – semiconductor plant downtime |
| LEARNING OBJECTIVES | Hear perspectives from all stakeholders on a persistent and difficult issue in microelectronics manufacturing – uncertain power quality |
| PREREQUISITES |